A Thin Film Transistor Liquid Crystal Display (TFT-LCD for short) is an important panel display apparatus, which is divided into a vertical electric field type and a horizontal electric field type according to direction of the electric field for driving the liquid crystal. In the vertical electric field type TFT-LCD, it is required to form pixel electrodes on an array substrate and form common electrodes on a color filter substrate, which is, for example, in a TN mode. In the horizontal electric field type TFT-LCD, it is required to form pixel electrodes and common electrodes on an array substrate simultaneously. Current horizontal electric field type display technology may improve the image quality of TFT-LCD product, and has advantages of high resolution, high transmittance, low power consumption, wide view angle, high aperture ratio, low chromatism and no push Mura etc.
An existing array substrate primarily comprises thin film transistors, gate lines, data lines, pixel electrodes and common electrodes. Description will be made below with respect to an array substrate comprising bottom-gate type thin film transistors.
As shown in FIG. 1, the array substrate comprises: a gate 2, a gate line, and a common electrode line, which are in the same layer and made of the same material, formed on a base 1; a gate insulation layer 3 formed on the gate 2, the gate line and the common electrode line; an active layer 4 formed on the gate insulation layer 3; a source 5-1, a drain 5-2 and a data line (not shown), which are in the same layer and made of the same material, formed on the active layer 4; a planarization layer formed on the source 5-1, the drain 5-2 and the data line, a plate-shaped pixel electrode 6 formed on the planarization layer and connected to the drain 5-2 through a first via hole penetrating through the planarization layer; a passivation layer formed on the pixel electrode 6; a slit-shaped common electrode 8, which is connected to the common electrode line through a second via hole penetrating through the passivation layer, the planarization layer and the gate insulation layer formed on the passivation layer, formed on the passivation layer. The gate 2, the source 5-1 and the drain 5-2 of the thin film transistor are made of metal, and the pixel electrode 6 and the common electrode 8 are made of indium tin oxide (ITO) which is transparent and conductive.
The inventor finds from the above structure that the array substrate in the prior art at least has following problems: since the resistance of the common electrode line itself is large, when a voltage is applied to the common electrode through the common electrode line, a RC signal delay may be caused, and an IR drop may occur in the common electrode line; meanwhile, since the common electrode line overlaps the data line, a large coupling capacitance is inevitable, so that load on the common electrode may be increased, leading to large fluctuation on the common electrode, and serious greenish may be caused.